Embodiments of the present application refer to a test equipment, comprising a user-site calibration unit, a method for operating a test equipment and a corresponding computer program. Embodiments refer to a hardware architecture and software method for the AC-calibration of a high bandwidth analog IO-pin of an automated test equipment.
As with digital pins in automated test equipment (ATE) the analog pins follow the trend of a “per-pin-architecture” and become configurable IO pins. This means they provide both capabilities of either sourcing or capturing analog signals. When sourcing analog signals the analog IO pin behaves like an arbitrary waveform generator (AWG) and when capturing analog signals the analog IO pin behaves like a digitizer (DTZ) and digitizes analog data for comparison against expected digital data in the time or frequency domain.
The AWG portion of such an analog pin (in the following called an analog channel) is typically composed of a digital-to-analog converter (DAC), bandwidth limiting filters and an amplifier stage for ranging and offset control. The DTZ portion of an analog channel is typically composed of an input termination stage, an amplifier stage for ranging and offset control, bandwidth limiting filters and an analog-to-digital converter (ADC). The digital interfacing of both, the DAC of the AWG and the ADC of the DTZ are connected to a digital signal processor that is able to perform hardware based real-time signal processing on the signal data represented digitally. The signal processor finally transfers the digital data between the hardware channel and the IO interface of a workstation or vice versa. The workstation runs ATE software on the workstation processor for configuring and control of the ATE pins and other tester hardware. This software performs further post-processing on data received from the DTZ and performs the desired tests on it. This software also performs preprocessing of data that will be sent to the AWG for waveform generation.
The characteristic of the analog portion of both, the AWG as well as the DTZ including the converters is typically specified in terms of a frequency characteristic showing both the gain and the phase in dependency of the frequency together with key frequency domain performance parameters such as total harmonic distortion (THD), signal-to-noise-ratio (SNR) and spurious free dynamic range (SFDR).
An inherent expectation for such a flexible analog IO pin is a flat frequency characteristic regardless if it is configured as AWG or DTZ. The frequency characteristic should be independent of the gain and offset settings. This means that the amplitude of a spectrally pure sine wave propagates through either type of analog channel, DTZ or AWG, independent of the frequency of the sine wave and independent of the sample rate chosen for conversion, as long as this frequency lies in the pass band of the configured bandwidth limiting filters. In the stop band the expectation is that any spectral component will be significantly attenuated according to a specification. Between pass band and stop band the expectation is a soft transition without any discontinuities.
In reality the ideal expectation of a flat frequency response cannot be met. The reason is the presence of various parasitic effects and inaccuracies in the used semiconductors and passive parts in the analog signal paths as well as the non-ideal signal propagation on the traces and planes of the used PCB. Therefore the frequency characteristic of the DTZ and AWG channel does not only show gain deviations with respect to DC but also gain deviations depending on frequency. Typically the frequency characteristic shows a certain ripple in the pass band potentially superimposed to either a peaking or a falling slope in the pass band. In the stop band it typically shows an attenuation that is neither constant nor monotonously increasing.
For simulation purposes and the simplified description of the system, the frequency characteristic of an analog IO channel can be modeled like a conventional low pass with ripples such as a Chebyshev or Butterworth low pass that behaves linearly followed by an ideal ADC (DTZ) or preceded by a DAC (AWG).
The presence of means for digital processing in terms of a processor on a channel board of the ATE (test processor) or a processor in the workstation suggests that the deviation of an ideal behavior is compensated by either pre-distortion of AWG data during signal generation or equalization of data during capturing by the DTZ. The requirement for such a compensation to work properly is the provisioning of a hardware architecture that allows the measurement of the deviation from the ideal behavior and further allows the compensation to be executed according to the deviation with minimum overhead and cost. Since all steps of this compensation concept should advantageously, but not necessarily, run automatically with the purpose of an ideal outcome in the frequency domain. Therefore this compensation procedure can also be referred to as an automated AC calibration.
Particularly the cost of test is a major goal for designing ATE that imposes certain limits on the strategy of AC calibration. One contributor for low cost of test is a high parallelism of tester resources. As a consequence the pin density needs to be maximized. In turn, the high pin density typically entails a high degree of integration and the minimizing of components on the pin electronic cards. Since calibration is an add-on to the regular pin functionality the provisioning is contra-productive with respect to minimizing the footprint of a pin electronic channel. Therefore AC-calibration should add only a very minimum of extra floor-space on a pin-electronic PCB and its cost should be very well justified with the improvements in performance it brings about.
Two types of calibration procedures have to be distinguished: Factory calibration and user calibration. Whereas factory calibration is performed once after manufacturing in the factory or during factory service and repair the user calibration can be repeated on the users test floor whenever it is appropriate. Due to the fact that electronic components can change their behavior over time and over environmental conditions a user calibration is of advantage. However the cost penalty is larger for the user calibration since measurement means to determine the deviation from ideality need to be put on the board. For factory calibration the effort is much higher but the achievable accuracy is also higher due to more precise external equipment that can be used. Therefore a hybrid approach is typically chosen, that contains a certain amount of factory calibration especially for minimized measurement resources on the channel PCB and a user calibration that makes use of these calibrated but minimized on-board resources for calibrating the individual channels during user calibration.
According to a State-of-the-Art approach, AC calibration can be achieved in the time or in the frequency domain. Since most ATE is equipped with digital signal processing capabilities, it is obvious to perform the compensation with digital filtering using either a real time signal processing unit implemented in hardware or to have the ATE software running on a workstation or a digital signal processor to perform the digital filtering.
The compensation filter properties may be determined during a factory calibration by measuring the impulse response of an analog channel in the time domain. The impulse response represents the channel specific frequency characteristic in the time domain and it can be also converted in the frequency domain. Since the goal is a flat magnitude response the frequency compensation function in an ideal case is just the inverse (1/x operation) of the Fourier transformed impulse response. Just the magnitude has to be taken into account and an arbitrary linear phase may be added to help implementation of the final FIR compensation filter in the signal processing unit. When the frequency compensation function is transformed back into the time domain the resulting compensation impulse response can be sampled with an appropriate sampling rate, and the samples can be used as coefficients for the digital FIR compensation filter. In this concept, the compensation filter coefficients determined after manufacturing can be stored in a non-volatile memory during the factory calibration and therefore travel with the pin electronic board. An equivalent approach is to perform the measurement of the frequency characteristic of the analog channel in the frequency domain using a network analyzer followed by a Fourier transform to obtain the impulse response of the channel. Finally all the compensation operation can at least theoretically also be performed in the frequency domain when the Fourier transform of the data that need to be compensated can be executed fast enough by a signal processing unit.
A major drawback of both concepts mentioned above is the high effort for the measurement of the frequency characteristic per channel using instruments such as an oscilloscope or a network analyzer. Furthermore, the fact that this concept includes a factory calibration, means that re-calibration only can be performed completely when service personnel disassembles the ATE, exchanges the channel board and sends it back to the factory for calibration.
Therefore, there is the need for an improved approach. The objective of the present application is to enable a user-site calibration technique having improved performance while consuming less resources.